1. Field of the Invention
This invention relates to a ground pad structure for preventing solder extrusion and a semiconductor package having the ground pad structure, and more particularly, to a surface mount technology that can be used in a flip-chip ball grid array (FCBGA) package structure to enhance the bonding reliability of the chip by modifying the formation of the ground ball pads.
2. Description of Related Art
A semiconductor chip is capable of being electrically connected to a substrate or a printed circuit board through a plurality of conductive metal solder means, such as solder balls or solder bumps being arranged in a matrix array, and is thereby packaged into a semiconductor package, such as a ball grid array (BGA) package, in a manner of the flip-chip formation.
The surface of the substrate is covered with an insulative solder mask layer while the chip is mounted in a flip-chip manner onto the substrate. A plurality of conductive traces are buried beneath the solder mask layer and a solder pad is formed on the terminal of each conductive trace at a location that corresponds to one of the solder bumps to be soldered on the chip and is exposed from the solder mask layer. As a result, after the solder bumps are bonded to the corresponding solder pads on the substrate, respectively, the electronic signals of the chip are capable of being transmitted to the substrate and being electrically coupled to an external means (e.g. a printed circuit board) through the solder bumps and the conductive traces, which are distributed on the substrate and penetrate the resin core of the substrate through vias.
The terminal of the conductive trace (i.e. solder pad) is generally a solder mask defined (SMD) solder pad as shown in FIGS. 1A and 1B, wherein the size of the opening 102a of the solder mask layer 102 is smaller than the solder pad 103 formed on the resin core 100 of the substrate 10, so as to have the circumference of the solder pad 103 being covered by the solder mask layer 102.
Regarding the flip-chip packaging technology, a plurality of metal solder means 112 (in general, solder bumps) are pre-disposed onto the chip pads 113 on the active surface 110 (the surface distributed with a plurality of electric circuits and elements) of the chip 11, then the chip 11 is bonded and reflowed onto the substrate 10 with its active surface 110 facing downwardly to form a solder bonding portion including the chip pads 113, solder bumps 112 and solder pads 103, as shown in FIGS. 2A and 2B. An insulative material 12, such as resin, is thereafter filled into the gap under the chip 11 through an underfill or molding process to strengthen the solder joint of the solder bumps 112.
However, while the flip-chip structure has been encapsulated and proceeded with a followed reflow process for planting the solder balls, the solder bumps 112 within the solder bonding portion are molten and expanded in volume due to the high reflow temperature. As the space receiving the solder bumps 112 is surrounded by the insulative encapsulant 12, the molten and swelled solder bumps 112 are forced to be extruded and penetrated into the gaps between the solder mask layer 102 and the solder pads 103 and between the solder mask layer 102 and the resin core 100. As a result, bridges 105 or 106 cause an electric short between the adjacent solder bumps 112 or between the adjacent conductive traces 101, as shown in FIGS. 2A and 2B. This is due to poor adhesion between the solder mask layer 102 and the solder pads 103 and thereby results in an easy penetration into the gap between the solder mask layer 102 and the solder pads 103 by the molten and extruded solder bumps 112. Although the adhesion between the solder mask layer 102 and the resin core 100 is better than that between the solder mask layer 102 and the solder pads 103, if the adhering area between the solder mask layer 102 and the resin core 100 is not large enough, the adhesion between the solder mask layer 102 and the resin core 100 would remain poor and results in an easy penetration into the gap between the solder mask layer 102 and the resin core 100 by the molten and extruded solder bumps 112 and contribute to the bridges occurred between the adjacent solder bumps 112 or between the adjacent conductive traces 101.
In comparison with the solder mask defined (SMD) solder pad, a non-solder mask defined (NSMD) solder pad is shown in FIGS. 3A and 3B, wherein the opening 102b of the solder mask layer 102 is larger than the solder pad 103 formed on the resin core 100, and thereby expose the solder pad 103, a portion of the surface of the resin core 100 surrounding the solder pad 103, and a portion of the conductive trace 101 connecting the solder pad 103 together from the opening 102b of the solder mask layer 102.
While adopting the non-solder mask defined (NSMD) solder pad into a flip-chip ball grid array (FCBGA) package structure, as shown in FIG. 4, the solder bump 112 is capable of being planted onto the solder pad 103 without contacting the solder mask layer 102 and result in a direct mounting between the surface of the resin core 100 exposed around the solder pad 103 and the insulative encapsulant 12. Since the adhesion between the insulative encapsulant 12 and the resin core 100 is good, the molten and swelled solder bumps 112 due to the high reflow temperature during the reflow process for planting the solder balls will have difficulty to extrude into the gap between the solder mask layer 102 and the resin core 100 through the gap between the resin core 100 surrounding the solder pad 103 and the insulative encapsulant 12. As a result, bridges occurred between the adjacent solder bumps 112 or between the adjacent conductive traces 101 are prevented.
However, among a typical layout of the solder bumps within a flip-chip ball grid array (FCBGA) package, the ground solder bumps 112a are generally disposed in a central region and are mounted onto a ground plane 108 disposed on a corresponding location on the resin core 100 of the substrate 10. Under this layout, in order to create a non-solder mask defined (NSMD) ground pad on a location corresponding to the ground solder bump 112a on the ground plane 108, as shown in FIG. 6, a pair of semi-circular slots 108a are formed respectively on the ground plane 108 to have the non-solder mask defined ground pad 108b be connected to the ground plane 108 through a pair of tie bars 108c, and the ground pad 108b and a portion of the tie bars 108c are thereby exposed together from the opening 102b (as shown in a dotted line in FIG. 6) of the solder mask layer 102. However, the non-solder mask defined ground pad 108b is not only time-consuming in its fabrication, but also leads to a poor grounding ability since the non-solder mask defined ground pad 108b is connected to the ground plane 108 merely by a pair of tiny tie bars 108c. Moreover, the formation of a plurality of paired semi-circular slots 108a on the ground plane 108 will make the ground plane 108 an imperfect and non-continuous plane and will therefore dramatically affect the grounding ability of the ground plane 108.
As a result, the non-solder mask defined ground pad 108b as shown in FIG. 6 is generally refrained from being provided onto the ground plane of the flip-chip ball grid array package. Instead, the solder mask defined (SMD) solder pad is adopted to maintain a perfect plane, as shown in FIGS. 5A and 5B, in order to achieve a preferred grounding ability.
However, although a good grounding ability is able to be maintained preferably by adopting the solder mask defined (SMD) solder pad on the flip-chip ball grid array package as shown in FIGS. 5A and 5B, an easy occurrence of electric shorts among the conductive traces due to the molted solder bump extruded and flooded over the adjacent conductive traces from the solder mask defined (SMD) solder pad is still inevitable. That is, as shown in FIGS. 5A and 5B, while the reflow process for planting the solder balls has been conducted, the ground solder bumps 112a located on the circumference of the ground plane 108 are molten and expanded in volume due to the high reflow temperature and are forced to be extruded and penetrated into the gaps between the solder mask layer 102 and the ground plane 108 due to poor adhesion therebetween. As a result, bridges 107 cause an electric short between the adjacent conductive traces 101, as shown in FIGS. 5A and 5B.